program Tesa_Drehbake_Stator;

//Autor: Michael Kinz www.team-iwan.de/technik/elektronik/drehbake2.php

{ $BOOTRST $00C00}         {Reset Jump to $00C00}
{$NOSHADOW}
{ $W+ Warnings}            {Warnings off}

Device = mega8, VCC = 5;

Import SysTick, SerPort, PWMport1A, PWMport1B, TWIslave;

From System Import;

Define
  ProcClock      = 16000000;        {Hertz}
  SysTick        = 10;             {msec}
  StackSize      = $0064, iData;
  FrameSize      = $0064, iData;
  SerPort        = 18150, Stop1;    {Baud, StopBits|Parity}
  RxBuffer       = 8, iData;
  TxBuffer       = 8, iData;
  PWMres1        = 8;              {bits}
  PWMpresc1      = 1;
  TWImode        = Transparent;    {HandShake or Transparen}
  TWIbuffer      = 8, iData;       {buffer/packet size}
  TWIaddr        = 15;             {default slave address}

Implementation

{$IDATA}

{--------------------------------------------------------------}
{ Type Declarations }

type


{--------------------------------------------------------------}
{ Const Declarations }


{--------------------------------------------------------------}
{ Var Declarations }
{$IDATA}
var
  ser_byte_low   : byte;
  ser_byte_high  : byte;
  LED[@PortD, 7] : bit;
  Trafo_enable[@Portb, 3]    : bit;


{--------------------------------------------------------------}
{ functions }
procedure InitPorts;
begin
  DDRB:=  %00001110;
  DDRD:=  %10000000;
end InitPorts;


{--------------------------------------------------------------}
{ Main Program }
{$IDATA}

begin

  initports;
  EnableInts;
  tccr1a := %10110001;
  tccr1b := %00000001;
  PWMport1A:=  80;
  PWMport1B:= 175;
  Trafo_enable := 1;
  loop
  repeat until SerStat; {warte auf RxReady}
    mdelay(20)  ;
    ser_byte_low := serinp;
    
    ser_byte_high:= serinp;
    //mdelay(20)  ;
    flushbuffer(rxbuffer);
    TWITXBUFFER[0] := ser_byte_low;
    TWITXBUFFER[1] := ser_byte_high;
    led := 1;
    mdelay(1);
    led := 0;

  endloop;
end Tesa_Drehbake_Stator.


